1. Field of the Invention
The present invention relates in general to automatically setting a status of a dynamic random access memory (referred to hereinafter as DRAM), and more particularly to a device and a method for automatically setting a status of a DRAM through the control of a clock enable signal, in which the clock enable signal is controlled and analyzed to automatically set a mode of the DRAM.
2. Description of the Prior Art
Generally, in order to control the operations of an SDRAM and a DRAM, a main processing unit MPU processes control signals such as a chip select signal /CS, a row address strobe signal /RAS, a column address strobe signal /CAS, a write enable signal /WE and a clock enable signal CKE.
For example, an operation mode of the DRAM is changed according to a state of the clock enable signal. The clock enable signal remains at its high logic state while a normal operation is performed, and then goes low in logic when a mode change operation is performed.
However, the mode change operation is not performed only by changing the state of the clock enable signal but by combining it with the other signals.
Usually, in the case where the clock enable signal becomes low in logic, the current operation mode is changed to a power down mode in which a self-refresh operation may be performed.
Another mode operable by the low logic state of the clock enable signal is a clock suspend mode. However, the clock suspend mode can be performed by combining the clock enable signal of low logic with the row and column address strobe signals.
For this reason, set levels of pins for inputting the above-mentioned signals must be known thoroughly. Further, the levels of the signal input pins must be changed whenever a function is changed. These are inconvenient to the user.